At a glance: The ST54M integrates hardware-accelerated PQC algorithms (ML-KEM per FIPS-203, ML-DSA per FIPS-204) in a chip for secure NFC and eSIM functionality.
STMicroelectronics has introduced the ST54M — a chip for NFC and eSIM that accelerates Post-Quantum Cryptography directly in hardware. With two ARM cores and a dedicated PQC accelerator, the component is aimed at smartphones and smartwatches.
STMicroelectronics has developed the ST54M — a compact system-on-chip for contactless communication and embedded SIM. The chip combines two ARM cores with a hardware accelerator specifically designed for Post-Quantum Cryptography (PQC).
The hardware accelerator supports the two standardized PQC algorithms ML-KEM (per FIPS-203) for key encapsulation and ML-DSA (per FIPS-204) for digital signatures. These algorithms are considered resistant to attacks by quantum computers and have been formally adopted by U.S. standardization bodies.
For CTOs, this means: The standardization of PQC algorithms is becoming operational. Manufacturers like STMicroelectronics are already integrating them at the hardware level of mass-market devices — not as a software update, but architecturally. This reduces performance penalties when using quantum-safe cryptography and creates a hardware-backed trust foundation for NFC transactions and eSIM management in millions of smartphones and smartwatches.
Source: www.heise.de · Published June 24, 2026
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